Motivo Plans to Speed Up Chip Design with AI by Raising 12 million dollars Series A

With chip design a long slog of trial and error, Motivo Plans to Speed Up Chip Design with AI by Raising 12 million dollars Series A. Motivo is a five-year-old start-up from a chip industry veteran. They are currently is creating a software to speed up chip design from taking years to months using AI. On the 12 of August 2021, the company announced a twelve million dollars series A.

Motivo Plans to Speed Up Chip Design with AI by Raising 12 million dollars Series A

Company reports state that the company (Motivo) has now raised a total of over eighteen million dollars with its previous seed funding. The round was led by Intel Capital along with new investors Storm Ventures and Inventus Capital. There was also participation from Seraph Group.

Motivo Plans to Speed Up Chip Design with AI by Raising 12 million dollars Series A

The co-founder of the company Motivo is Bharath Rangarajan. Bharath Rangarajan has worked in the chip industry for over twenty years and he saw the fundamental trend and issues. Note, the chip design process is highly time-sensitive and hence taking years to come up with a successful candidate. Typically, the first person, company, or group to market it wins.

According to Techcrunch, Rangarajan started the company to put artificial intelligence to work on the design process and bring chips to market faster with more accuracy in the production cycle.

Further News on the Topic

In the quote, Rangarajan said “We can train AI engine to bring about human judgment and to do a lot of design for manufacturability on the design without causing any other issue. So, we avoid all these iteration loops [and we can also] decide code and validation and timing and again we’re going from weeks and months to days”.

From what we know so far, the company’s ultimate goal is to take the chip design process and distill it down using software and intelligence from three years to three months.

While they may not be there yet, they have started to attack the problem and have a working product that looks at chip layout, the underlying RTL code, and runs the chip, and the netlist which describes how the various pieces and electronics on the chip connect together.

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